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BestsellerE-book

Title Low power high speed CMOS multiplexer design / editors, Shyam Akashe and Khusbou Mishra.

Publication Info. Hauppauge, New York : Nova Science Publisher's, Inc., [2014]

Item Status

Description 1 online resource.
Physical Medium polychrome
Description text file
Series Electrical Engineering Developments
Electrical engineering developments series.
Note Includes index.
Contents Scaling issue of recent design of CMOS device nanotechnology -- Impact of techniques in nanoscale CMOS technology -- Various logic styles of multiplexer for low power designs -- Leakage reduction techniques on multiplexer circuit for the system SOC design -- Impact of GDI and FINFET on multiplexer.
Summary This book proposes the reversible logic Multiplexer and also demarcates between reversible and irreversible logic Multiplexers. For power reduction in future computing technologies, reversible logic is a very productive approach of logic synthesis. The purpose of this book is to reduce power and area of 2:1 MUX, 4:1 MUX and reversible logic while maintaining the viable performance. The diverse configurations are designed using different topologies of 2:1 MUX and 4:1 MUX such as CMOS based MUX, transmission gate and pass transistor. The editors propose a new application of GDI (Gate-Diffusion I.
Local Note eBooks on EBSCOhost EBSCO eBook Subscription Academic Collection - North America
Subject Switching circuits.
Switching circuits.
Mixing circuits.
Mixing circuits.
Multiplexing.
Multiplexing.
Electronic circuit design.
Electronic circuit design.
Metal oxide semiconductors, Complementary.
Metal oxide semiconductors, Complementary.
Low voltage integrated circuits.
Low voltage integrated circuits.
Genre/Form Electronic books.
Electronic books.
Added Author Akashe, Shyam.
Mishra, Khusbou.
Other Form: Print version: Low power high speed CMOS multiplexer design 9781634633222 (DLC) 2014044402 (OCoLC)896359257
ISBN 9781634636209 electronic book
1634636201 electronic book
9781634633222
1634633229