LEADER 00000cam a2200673Ma 4500 
001    ocn785777958 
003    OCoLC 
005    20160910032342.6 
006    m     o  d         
007    cr cn||||||||| 
008    120227s2011    si a    ob    001 0 eng d 
016 7  015880451|2Uk 
019    779937767|a858228012|a903928741 
020    9789812813992|q(electronic book) 
020    9812813993|q(electronic book) 
020    |z9812568638 
020    |z9789812568632 
035    (OCoLC)785777958|z(OCoLC)779937767|z(OCoLC)858228012
       |z(OCoLC)903928741 
040    E7B|beng|epn|cE7B|dOCLCQ|dCIT|dOCLCQ|dUKMGB|dUIU|dDEBSZ
       |dOCLCO|dYDXCP|dOCLCQ|dN$T|dIDEBK|dOCLCF|dBWS|dEBLCP
       |dOCLCQ 
049    RIDW 
050  4 TK7871.95|b.L58 2011eb 
072  7 TEC|x008110|2bisacsh 
082 04 621.3815284015118|223 
090    TK7871.95|b.L58 2011eb 
100 1  Liu, Weidong,|d1965-|0https://id.loc.gov/authorities/names
       /no2001051964 
245 10 BSIM4 and MOSFET modeling for IC simulation /|cWeidong Liu,
       Chenming Hu. 
264  1 Singapore :|bWorld Scientific Pub. Co.,|c2011. 
300    1 online resource (xix, 414 pages) :|billustrations. 
336    text|btxt|2rdacontent 
337    computer|bc|2rdamedia 
338    online resource|bcr|2rdacarrier 
340    |gpolychrome|2rdacc 
347    text file|2rdaft 
490 1  International series on advances in solid state 
       electronics and technology 
504    Includes bibliographical references and index. 
505 0  Forword; Dedication; Preface; Contents; Chapter 1 BSIM and
       IC Simulation; 1.1 Circuit Simulation and Compact Models; 
       1.2 BSIM -- The Beginning; 1.3 BSIM3 -- A Compact Model 
       Based on New MOSFET Physics; 1.4 BSIM3v3 -- World's First 
       MOSFET Standard Model; 1.5 BSIM4 -- Aimed for 130nm Down 
       to 20nm Nodes; 1.6 BSIM SOI; 1.7 Impact of BSIM; 1.8 
       Looking Towards the Future -- The Multi-Gate MOSFET Model;
       1.9 The Intent of This Book; References; Chapter 2 
       Fundamental MOSFET Physical Effects and Their Models for 
       BSIM4; 2.1 Introduction and Chapter Objectives; 2.2 Gate 
       and Channel Geometries and Materials. 
505 8  2.2.1 Gate and Channel Lengths and Widths2.2.2 Model Card 
       and Parameter Binning; 2.2.3 Gate Stack and Substrate 
       Material Model Options; 2.3 Temperature-Dependence Model 
       Options; 2.4 Threshold Voltage; 2.4.1 Long Channel with 
       Uniform Substrate Doping; 2.4.2 Short-Channel Effect: Vth 
       Roll-Off and Drain Bias Effects; 2.4.3 Narrow-Width 
       Effects; 2.4.4 Non-Uniform Substrate Doping; 2.4.4.1 Non-
       Uniform Vertical Doping; 2.4.4.2 Non-Uniform Lateral 
       Doping: Pocket Implants; 2.4.5 Vth Temperature Dependence;
       2.4.6 BSIM4 Vth Equation; 2.5 Poly-Silicon Gate Depletion;
       2.6 Bulk-Charge Effects. 
505 8  2.7 LDD Resistances2.8 Finite Charge Thickness; 2.9 
       Effective Mobility; 2.10 Layout-Dependent Effects: 
       Mechanical Stress and Proximity Effects; 2.11 Chapter 
       Summary; 2.12 Parameter Table; References; Chapter 3 
       Channel DC Current and Output Resistance; 3.1 Introduction
       and Chapter Objectives; 3.2 Channel Current Theory; 3.3 
       Single Continuous Channel Charge Model; 3.4 Channel 
       Current in Subthreshold and Linear Operations; 3.5 
       Velocity Saturation and Velocity Overshoot; 3.6 Output 
       Resistance in Saturation Region; 3.6.1 CLM: Channel Length
       Modulation; 3.6.2 DIBL: Drain-Induced Barrier Lowering. 
505 8  3.6.3 DITS: Drain-Induced Threshold Voltage Shift Due to 
       Non-Uniform Doping3.6.4 SCBE: Substrate Current Induced 
       Body-Bias Effect; 3.6.5 Channel Current Model for All 
       Regions of Operation; 3.7 Source-End Velocity Limit; 3.8 
       Chapter Summary; 3.9 Parameter Table; References; Chapter 
       4 Gate Direct-Tunneling and Body Currents; 4.1 
       Introduction and Chapter Objectives; 4.2 Gate Direct-
       Tunneling Current Theory and Model; 4.2.1 Tunneling 
       Mechanisms and Current Components; 4.2.2 Gate Oxide 
       Voltage; 4.2.3 Gate-Body Tunneling Current Igb; 4.2.4 Gate
       -Source/Drain Tunneling Through Overlap Regions. 
505 8  4.2.5 Gate-Channel Tunneling Current4.2.5.1 Igc0: The Vds 
       = 0 Bias Scenario; 4.2.5.2 Igcs and Igcd Partitioning: The
       Non-Zero Vds Scenario; 4.2.6 Characterization and 
       Parameter Extraction; 4.3 Body Currents; 4.3.1 Impact 
       Ionization; 4.3.2 Gate-Induced Source and Drain Leakage; 
       4.4 Summary of BSIM4 Branch and Terminal DC Currents; 4.5 
       Chapter Summary; 4.6 Parameter Table; References; Chapter 
       5 Charge and Capacitance Models; 5.1 Introduction and 
       Chapter Objectives; 5.2 MOSFET Capacitance Theory; 5.3 
       Intrinsic Charge and Capacitance Models; 5.3.1 Charge-
       Thickness Model (CTM). 
520    This book presents the art of advanced MOSFET modeling for
       integrated circuit simulation and design. It provides the 
       essential mathematical and physical analyses of all the 
       electrical, mechanical and thermal effects in MOS 
       transistors relevant to the operation of integrated 
       circuits. Particular emphasis is placed on how the BSIM 
       model evolved into the first ever industry standard SPICE 
       MOSFET model for circuit simulation and CMOS technology 
       development. The discussion covers the theory and 
       methodology of how a MOSFET model, or semiconductor device
       models in general, can be implemented to be ro. 
590    eBooks on EBSCOhost|bEBSCO eBook Subscription Academic 
       Collection - North America 
650  0 Metal oxide semiconductor field-effect transistors|0https:
       //id.loc.gov/authorities/subjects/sh85084065|xComputer 
       simulation.|0https://id.loc.gov/authorities/subjects/
       sh99005300 
650  0 Electronic circuit design|xData processing.|0https://
       id.loc.gov/authorities/subjects/sh85042278 
650  7 Metal oxide semiconductor field-effect transistors
       |xComputer simulation.|2fast|0https://id.worldcat.org/fast
       /1017615 
650  7 Metal oxide semiconductor field-effect transistors.|2fast
       |0https://id.worldcat.org/fast/1017614 
650  7 Electronic circuit design|xData processing.|2fast|0https:/
       /id.worldcat.org/fast/906866 
655  4 Electronic books. 
700 1  Hu, Chenming.|0https://id.loc.gov/authorities/names/
       n83055893 
776 08 |iPrint version:|aLiu, Weidong, 1965-|tBSIM4 and MOSFET 
       modeling for IC simulation.|dSingapore ; London : World 
       Scientific, 2011 
830  0 International series on advances in solid state 
       electronics and technology.|0https://id.loc.gov/
       authorities/names/no95055036 
856 40 |uhttps://rider.idm.oclc.org/login?url=http://
       search.ebscohost.com/login.aspx?direct=true&scope=site&
       db=nlebk&AN=514852|zOnline eBook. Access restricted to 
       current Rider University students, faculty, and staff. 
856 42 |3Instructions for reading/downloading this eBook|uhttp://
       guides.rider.edu/ebooks/ebsco 
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948    |d20161017|cEBSCO|tebscoebooksacademic updated AugtoOct17
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